View M64894GP_285563.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MITSUBISHI ICS (TV)
M64894FP/GP
SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR
DESCRIPTION
The M64894 is a semiconductor integrated circuit consisting of PLL frequency synthesizer for TV/VCR using I 2C BUS control. It contains the prescaler with operating up to 1.3GHz, 4 band drivers and tuning Amplifier for direct tuning. Built-in 4 band drivers.
PIN CONFIGURATION (TOP VIEW)
PRESCALER INPUT GND SUPPLY VOLTAGE 1 SUPPLY VOLTAGE 2
fin GND VCC1 VCC2 BS4
1 2
16 Xin 15 ADS
FEATURES
3 4 5 6 7 8
14 SDA 13 SCL 12 ADC 11 VCC3 10 Vtu 9 Vin
CRYSTAL OSCILLATOR CHIP ADDRESS INPUT DATA INPUT CLOCK INPUT A/D INPUT SUPPLY VOLTAGE 3 TUNING OUTPUT FILTER INPUT
M64894FP/GP
* * * * * * * * *
4 integrated PNP band drivers (Io=40mA,Vsat=0.2V typ@Vcc1 to 13.2V) Built-in high-withstanding voltage tuning Amplifier Low power dissipation (Icc=20mA, Vcc=5V) Built-in prescaler with input amplifier (Fmax=1.3GHz) I2C bus control (Read and write mode) X'tal 4MHz is used to realize 3 type of tuning steps (Division ratio 1/512, 1/640, 1/1024) Built-in 5-level A/D converter Programmable chip address 16-pin small SOP/SSOP package
BAND SWITCHING OUTPUTS
BS3 BS2 BS1
Outline 16P2S-A (FP) 16P2Z-A (GP)
APPLICATION
TV, VCR tuners
FUNCTION RECOMMENDED OPERATING CONDITION
Supply voltage range..............................................V CC1=4.5 to 5.5V VCC2=VCC1 to 13.2V VCC3=28 to 35V Rated supply voltage...........................................................V CC1=5V VCC2=12V VCC3=33V
* * * * * * * * *
2-modulus prescaler (1/32 and 1/33) Built-in 4MHz crystal oscillator and reference divider Programmable divider (10-bit M counter, 5-bit S counter) Tri-state phase comparator Lock detector Band switch driver Op. Amp for direct tuning I2C bus receiver 5-level A/D converter
1
MITSUBISHI ICS (TV)
M64894FP/GP
SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR
BLOCK DIAGRAM
CRYSTAL CHIP ADDRESS OSCILLATOR INPUT DATA INPUT X in 16 ADS 15 SDA 14 CLOCK INPUT SCL 13 A/D INPUT ADC 12 SUPPLY VOLTAGE 3 VCC3 11 TUNING OUTPUT Vtu 10 FILTER INPUT Vin 9
OSC
I C RECEIVER
2
5-LEVEL A/D C
DIVIDER 10 10-BIT M COUNTER 1/32,1/33 5 5-BIT S COUNTER 4 1/8 P.O RESET BIAS BAND DRIVER PHASE COMPARATOR CHARGE PUMP LOCK DETECTOR AMP
AMP
1 f in PRESCALER INPUT
2 GND
3 VCC1 SUPPLY VOLTAGE 1
4 VCC2 SUPPLY VOLTAGE 2
5 BS4
6 BS3
7 BS2
8 BS1
BAND SWITCHING OUTPUTS
2
MITSUBISHI ICS (TV)
M64894FP/GP
SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR
DESCRIPTION OF PIN
Pin No. 1 2 3 4 5 6 7 8 Symbol fin GND VCC1 VCC2 BS4 BS3 BS2 BS1 Pin name Prescaler input GND Power supply voltage 1 Power supply voltage 2 Band switching outputs Function Input for the VCO frequency. Ground to 0V. Power supply voltage terminal. 5.0V 0.5V Power supply for band switching, Vcc 1 to 13.2V PNP open collector method is used. When the band switching data is "H", the output is ON. When it is "L", the output is OFF. This is the output terminal for the LPF input and charge pump output. When the phase of the programmable divider output (f 1/N) is ahead compared to the reference frequency (fref), the "source" current state becomes active. If it is behind, the "sink" current becomes active. If the phases are the same, the high impedance state becomes active. This supplies the tuning voltage. Power supply voltage for tuning voltage 28 to 35V A/D conversion of the input voltage. In control byte data input, the programmabule freq. Divider output and reference freq. output is selected by the test mode. Data is read into the shift register when the clock signal falls. Input for band SW and programmable freq. divider set up. In lead mode, itoutputs lock detector output and power down flagand a state of 5 level A/D converter. Chip address sets it up with the input condition of terminal. 4.0MHz crystal oscillator is connected.
9
Vin
Filter input (Charge pump output) Tuning output Power supply voltage 3 AD converter input/ Test port Clock input Data input Address switching input This is connected to the crystal oscillator
10 11 12 13 14 15 16
Vtu VCC3 ADC/ftest SCL SDA ADS Xin
ABSOLUTE MAXIMUM RATINGS (Ta=-20C to +75C, unless otherwise noted)
Symbol VCC1 VCC2 VCC3 VI VO VBSOFF IBSON tBSON Pd Topr Tstg Parameter Supply voltage 1 Supply voltage 2 Supply voltage 3 Input voltage Output voltage Voltage applied when the band output is OFF Band output current ON the time when the band output is ON Power dissipation Operating temperature Storage temperature Conditions Pin3 Pin4 Pin11 Not to exceed VCC1 fREF output Ratings 6.0 14.4 36.0 6.0 6.0 14.4 Per 1 band output circuit 50mA per 1 band output circuit 3circuit are pn at same time Ta=+75C 50.0 10 450 (470) -20 to +75 -40 to +125 Unit V V V V V V mA sec mW C C
RECOMMENDED OPERATING CONDITIONS (Ta=-20C to +75C, unless otherwise noted)
Symbol VCC1 VCC2 VCC3 fopr1 fopr2 IBDL Parameter Supply voltage 1 Supply voltage 2 Supply voltage 3 Operating frequency (1) Operating frequency (2) Band output current 5 to 8 Conditions Pin3 Pin4 Pin11 Crystal oscillation circuit Normally 1 circuit is on. 2 circuits on at the same time is max. It is prohibited to have 3 or more circuits turned on at the same time. Ratings 4.5 to 5.5 VCC1 to 13.2 28 to 35 4.0 80 to 1,300 0 to 40 Unit V V V MHz MHz mA
3
MITSUBISHI ICS (TV)
M64894FP/GP
SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR ELECTRICAL CHARACTERISTICS (Ta=-20C to +75C, Vcc1=5.0V, Vcc2=12V, Vcc3=33V, unless otherwise noted)
Symbol VIH VIL IIH IIL VOL VLO VBS IOLK1 VTOH VTOL IOH IOL ICPLK ICC1 ICC2A ICC2B ICC2C ICC3 Input pin Parameter "H" input voltage "L" input voltage "H" input current "L" input current "H" output voltage "L" output voltage Output voltage Leak current Output voltage "H" Output voltage "L" "H" output current Test pin 13 to 14 13 to 14 13 to 14 13, 14 14 14 5 to 8 5 to 8 10 10 9 9 9 3 4 4 4 11 VCC1=5.5V, Vi=4.0V VCC1=5.5V, Vi=0.4V VCC1=5.5V, Io=3mA VCC1=5.5V, Vo=5.5V VCC2=12V, Io=-40mA VCC2=12V band SW is OFF VCC3=33V VCC3=33V VCC1=5.0V, Vo=2.5V VCC1=5.0V, Vo=2.5V VCC1=5.5V, Vo=2.5V VCC1=5.5V VCC2=12V VCC2=12V VCC2=12V Io=-40mA VCC3=33V Output ON Test conditions Min. 3.0 - - - - - 11.6 - 32.5 - - - - - - - - - Limits Typ. Max. VCC1+0.3 - - - -4/-14 - - 11.8 - - 0.2 270 70 - 20 - 6.0 46.0 3.0 1.5 10 -10/30 0.4 10 - -10 - 0.4 370 110 50 30 0.3 8.0 48.0 4.0 Unit V V A A A A V A V V A A nA mA mA mA mA mA
SDA output Band SW Tuning output Charge pump
"L" output current Leak current Supply current 1 4 circuits: OFF 1 circuits: ON, Output: OPEN Output current 40mA Supply current 3 Supply current 2
Note. Typical values are measured at VCC1=5.0V, VCC2=12V, VCC3=33V, Ta=+25C.
SWITCHING CHARACTERISTICS (Ta=-20C to +75C, VCC1=5.0V, VCC2=12V, VCC3=33V, unless otherwise noted)
Symbol fopr Parameter Prescaler operating frequency Test pin 1 Test conditions VCC1=4.5 to 5.5V Vin=Vinmin to Vinmax 80 to 100MHz 100 to 200MHz VCC1=4.5 200 to 800MHz to 5.5V 800 to 1000MHz 1000 to 1300MHz VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V Min. 80 -24 -27 -30 -27 -18 0 4.7 4 4.7 4 4.7 0 250 - - 4 Limits Typ. - - - - - - - - - - - - - - - - - Max. 1300 4 4 4 4 4 100 - - - - - - - 1000 300 - Unit MHz
Vin
Operating input voltage
1
dBm
tSCL tBUF tHDSTA tLOW tHIGH tSUSTA tHDDAT tSUDAT tr tf tSUSTO
Clock pulse frequency Bus free time Data hold time SCL low hold time SCL high hold time Set up time Data hold time Data set up time Rise time Fall time Set up time
13 14 13 13 13 13, 14 13, 14 13, 14 13, 14 13, 14 13, 14
kHz s s s s s s ns ns ns s
4
MITSUBISHI ICS (TV)
M64894FP/GP
SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR
METHOD OF SETTING DATA
The input information to consit of 2 or data of 4bytes to lead to Chip Address is received in I Cbus receiver. It shows a definition of bus protocol admitted in the following. 1_STA CA 2_STA CA 3_STA CA 4_STA CA CB D1 CB D1 BB D2 BB D2 STO STO D1 CB D2 BB STO STO
2
The information of 5 bytes necessary for circuit operation is chip address and control data, bandS.W. data of 2 bytes and divider byte of 2 bytes. After the chip address input, 2 or data of 4 bytes are received. Function bit is contained the first and the third data byte to distinguish between divider data and control data, band data, and "0" goes ahead of divider data, and "1" goes ahead of control data, bandS.W. data.
STA : Start condition STO : Stop condition CA CB BB D1 D2 : Chip address : Control data byte : BandS.W. data byte : Divider data byte : Divider data byte
SDA
SCL S STA
1-7 ADDRESS CA
8 0
9 ACK
1-7 DATA
8
9 ACK
1-7 DATA
8
9 ACK P STO
Write mode format Byte Address Byte Devider Byte1 Devider Byte2 Control Byte1 Band SW Byte MSB 1 0 N7 1 X LSB A A A A A
1 N14 N6 CP X
0 N13 N5 T2 X
0 N12 N4 T1 X
0 N11 N3 T0 BS4
MA1 N10 N2 RSa BS3
MA0 N9 N1 RSb BS2
0 N8 N0 OS BS1
Read mode format Byte Address Byte Status Byte1 MSB 1 POR LSB A A
1 FL
0 X
0 X
0 X
MA1 A2
MA0 A1
1 A0
5
MITSUBISHI ICS (TV)
M64894FP/GP
SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR
DATA CORDING EXAMPLE
Write mode format example Byte Address Byte Devider Byte1 Devider Byte2 Control Byte1 Band SW Byte MSB 1 0 1 1 0 LSB 1 1 1 1 1 Condotion in data setting ADS input VCC1 Dividing ratio N=16544 C.P. current 270A fREF division ratio 1/1024 BS4 output ON
1 1 0 1 0
0 0 1 0 0
0 0 0 0 0
0 0 0 0 1
1 0 0 0 0
1 0 0 1 0
0 0 0 0 0
fVCO=Nx8xfREF=16544x8x(4MHz/1024)=517MHz Read mode format example Byte Address Byte Status Byte1 input Status Byte1 output MSB 1 1 0 LSB 1 1 1 Condotion in divise
1 1 1
0 1 1
0 1 1
0 1 1
1 1 0
1 1 1
1 1 1
FL "1"output at locked ADC input at open
TEST MODE DATA SET UP METHOD
Test Mode Bit Set Up X : Random, 0 or 1. normal "0"
RSa, RSb : Set up for the reference frequency division ratio RSa 1 0 X RSb 1 1 0 Division ratio 1/512 1/1024 1/640
MA1 ,MA0 : Programmabule Address Bit Address input voltage 0 to 0.1VCC1 Always valid 0.4VCC1 to 0.6*VCC1 0.9VCC1 to VCC1 MA1 0 0 1 1 MA0 0 1 0 1
OS : Set up the tuning amplifier OS 0 1 POR Tuning voltage output ON OFF : Power on reset flag. "1" output at reset : Lock detecter flag. "1" output at locked, "0" output at unlocked Mode Normal Test
N14 to N0 : How to set dividing ratio of the programable the divider
14=16384)+
Dividing ratio N=N14(2
+N0(20=1)
FL
Therefore, the range of division N is 1,024 to 32,768 Example) fvco=fREFx8xN =3.90625x8xN =31.25xN (kHz) CP: Setting up the charge pump current of the phase comparator CP 0 1 Charge pump current 70A 270A Mode Test Normal
A2, A1, A0: 5level A/D converter output data ADC input voltage 0.6VCC1 to VCC1 0.45VCC1 to 0.6VCC1 0.3VCC1 to 0.45VCC1 0.15VCC1 to 0.3VCC1 0 to 0.15VCC1 A2 1 0 0 0 0 A1 0 1 1 0 0 A0 0 1 0 1 0
The voltage accuracy allowance range: 0.03VCC1 (V)
T2, T1, T0 : Setting up for the test mode T2 T1 T0 00X 01X 110 111 100 101 Charge pump
Normal operation
POWER ON RESET OPERATION
Mode
Normal operation
High impedance Sink Source High impedance High impedance
Pin 12 condition ADC input ADC input ADC input ADC input fREF output f1/N output
(Initial state the power is turned ON) BS4 to BS1 Charge pump Tuning amplifier Charge pump current : OFF : High impedance : OFF : 270A
Test mode Test mode Test mode Test mode Test mode
Frequency division ratio : 1/1024
6
MITSUBISHI ICS (TV)
M64894FP/GP
SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR
TIMING DIAGRAM
START condition
SDA tBUF tLOW tr tf tHDSTA
SCL
tHDSTA
STOP condition
tHDDAT
tHIGH
tSUDAT
tSUSTA
START condition
tSUSTO
STOP condition
CRYSTAL OSCILLATOR CONNECTION DIAGRAM 16
18pF Crystal oscillator characteristics Actual resistance: less than 300 Load capacitance : 20pF
4MHz
7
MITSUBISHI ICS (TV)
M64894FP/GP
SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR
APPLICATION EXAMPLE
BUILT-IN PLL TUNER +5V 1000p 10 3 Vcc1 to 12V UHF VHF
M64894FP/GP
5
SW
18 Vcc2 47k BS4 11
BS4 +B
15
ADS
4
5 47k BS3 12
BS3 IF
IF
1 TEST 47k BS2 13 M5493X series 3 DATA 14 BS1 14
6 4-BAND TUNER
BS2
7 47k
BS1
8 fIN 17 MCU 4 CLK 13 GND 16 15 2 EN PD 20 LD/f1/N 12 ADC XIN 6 16 XOUT 7 GND 8 9 10 10 9 1 1000pF 0.1
1000p
Lo AGC
AGC
1.5n
VT
56k
56k
AFT
2.2n 100p
18p 4MHz
11 +33V BT
Note) Filter constant is for reference. Add a capacitor to stabilize the circuit.
Units Resistance : Capacitance : F
8

▲Up To Search▲

Price & Availability of M64894GP

	To Download M64894GP Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .